Gallium scan PET的問題,透過圖書和論文來找解法和答案更準確安心。 我們找到下列懶人包和總整理

中臺科技大學 醫學影像暨放射科學系暨研究所 潘榕光所指導 顏羽蓁的 單光子電腦斷層應用於紅斑性狼瘡腎炎半定量鎵腎臟造影的價值-可行性研究 (2020),提出Gallium scan PET關鍵因素是什麼,來自於紅斑性狼瘡腎炎、單光子電腦斷層、伽馬造影儀、鎵腎臟造影、半定量分析、逆運算疊代法。

而第二篇論文長庚大學 電子工程學系 陳始明所指導 Vivek Sangwan的 氮化鎵高電子遷移率晶體管(GaN-HEMT)在電磁輻射干擾下的可靠的研究 (2019),提出因為有 可靠性、故障分析、電磁輻射、電磁干擾、優選法、響應面方法的重點而找出了 Gallium scan PET的解答。

接下來讓我們看這些論文和書籍都說些什麼吧:

除了Gallium scan PET,大家也想知道這些:

單光子電腦斷層應用於紅斑性狼瘡腎炎半定量鎵腎臟造影的價值-可行性研究

為了解決Gallium scan PET的問題,作者顏羽蓁 這樣論述:

本可行性研究是奠基在Gamma Camera的掃描影像上,主要分為兩大部分,初期與進階期。初期運用不同的鎵-67腎臟造影的檢查結果,與腎臟切片進行關聯性分析後找出最佳造影方式;進階期運用逆運算疊代法制定一階非線性方程式來預測紅斑性狼瘡腎炎病人腎臟切片的結果,共納入了七種臨床上半定量鎵腎臟造影檢查判定結果的重要因子,經由STATISTICA 7.0軟體進行演算找出最相關的因子和預測方程式。初期共招收40位,進階期則增加至163位紅斑性狼瘡腎炎病人,皆接受鎵腎臟造影(平面造影、單光子電腦斷層)和腎臟切片檢查。經由繪製感興趣區域之半定量分析方式,獲得平面造影和單光子電腦斷層的ROIs並計算rati

o。結果顯示平面造影和單光子電腦斷層的檢查結果有顯著相關(rs為0.95),其中又以單光子電腦斷層的檢查結果與腎臟切片檢查結果的關聯性較高(rs為0.82)。進一步利用SPECT/CT檢查結果繪製的感興趣區域,計算各區域的counts、aera和mean count。進階期透過制定一個二十九項的一階非線性方程式,包括七種臨床上半定量鎵腎臟造影檢查判定結果的重要因子,(1)肌酸酐Creatinine(mg/dl)、(2)血液補體C4(mg/dl)、(3)尿素氮BUN(mg/dl)、(4)DNA雙股抗體Anti-ds DNA(WHO units/ml)、(5)左腎/脊椎比值L’t K/S rati

o、(6)脊椎Mean Count和(7)大腿 mean count(背景值),再經由STATISTICA 7.0軟體進行逆運算疊帶法演算。結果顯示預測值與實際值之相關係數r2為0.8279,Thigh Mean Count為主要貢獻因子(排名4)。接著對35名相同收案條件納入之病人進行分析以驗證該預測半經驗公式,結果顯示出高的一致性r2為0.872,證實本研究修訂的方程式可得良好的預測結果。

氮化鎵高電子遷移率晶體管(GaN-HEMT)在電磁輻射干擾下的可靠的研究

為了解決Gallium scan PET的問題,作者Vivek Sangwan 這樣論述:

Recommendation Letter from the Thesis Advisor………………………………….Thesis/ Dissertation Oral Defense Committee Certification…………………Acknowledgement…………………………………………………………………..iiiChinese Abstract……………………………………………………………………ivEnglish Abstract…………………………………………………………………vTable of Contents…………………………………………………………………viL

ist of Figures…………….…….………………………………………………xList of Tables………………….……………………………………………………xxChapter 1 Introduction………………………………………………………………11.1. Necessity of high power and high frequency devices……………………….11.2. Materials for high power and high frequency devices………………………31.3. Electromagnetic emiss

ions………………………………………………….81.4. Cause and effect of Electromagnetic emissions in high power and high frequency devices…………………………………………………………..161.5. State of the art of GaN-HEMTs……………………………………………191.6. Failure mechanism in GaN-HEMTs……………………………………….241.6.1. High electric field…………………………………

………………..251.6.2. Inverse piezoelectric effect…………………………………………271.6.3. Surface degradation………………………………………………..301.6.4. Thermal stress……………………………………………………...321.7. Summary…………………………………………………………………..341.8. Motivation of this work……………………………………………………351.9. Organization of the thesis

………………………………………………….36Chapter 2 Failure Analysis of GaN-HEMT power amplifier integrated circuit...382.1. Introduction of the Device under study……………………………………382.2. Failure mode of the DUT………………………………………………….392.3. Introduction of Failure Analysis Tools…………………………………….442.3.1. Digital Micr

oscope…………………………………………………..442.3.2. Scanning Electron Microscope………………………………………472.3.3. Focus Ion Beam-Scanning Electron Microscope……………………522.3.4. Energy-dispersive X-ray Spectroscopy……………………………..572.4. Failure analysis of the Device under study………………………………..592.5. Summary……………………………

…………………………………….61Chapter 3 Simulation Methodology……………………………………………..633.1. Introduction of the necessity of 3D simulation in the failure analysis………...633.2. Simulation tools: Keysight ADS, ANSYS HFSS, WorkBench, and COMSOL………………………………….………………………………..653.3. Simulation methodology……………………………

……………………673.4. Results and Discussion…………………………………………………..753.4.1. Measurement………………………………………………………753.4.2. Simulation…………………………………………………………803.5. Failure mechanism identified……………………………………………853.6. Summary………………………………………………………………..92Chapter 4 Evaluation of the Potential Electromagnet

ic Emissions within Integrated circuits due to reduced Vertical and Lateral Distance………944.1. Introduction………………………………………………………………944.2. Electromagnetic Emissions Study in IC layout sub-circuits……………..954.3. 3D IC layout effect on the electromagnetic emissions………………….1044.4. Behavior of

IC for EME with varying vertical distance………………..1164.4.1. Measurement Results……………………………………………...1174.4.2. Simulation Results…………………………………………………1184.5. Investigation of EME within Dice Stack in 3D-ICs………………………1224.6. Behavior of IC for EME at varying frequency……………………………1364.7. Summa

ry……………………………………………………………………138Chapter 5 Optimization of GaN-HEMT power amplifier IC…………………..1405.1. Introduction of various optimization algorithms…………………………1405.1.1. Classical Optimization Techniques…………………………………1415.1.1.1. Linear programming………………………………………1415.1.1.2. Nonlinear program

ming…………………………………..1435.1.1.3. Dynamic programming……………………………………1445.1.1.4. Stochastic programming………………………………….1445.1.2. Advanced Simulation Techniques………………………………….1465.1.2.1. Simulated annealing………………………………………1465.1.2.2. Genetic algorithm…………………………………………1465.1.2.3. Ant colony op

timization………………………………….1475.1.2.4. Particle swarm optimization………………………………1475.1.2.5. Response surface methodology…………………………..1485.2. Response surface methodology for optimization…………………………1495.3. Simulation results and discussion………………………………………..1515.4. Summary…………………………………………………………

……….159Chapter 6 Conclusion & Future work……………………………………………1606.1. Problem encountered and their solutions………………………………….1606.2. Conclusion…………………………………………………………………1616.3. Contribution of the Dissertation……………………………………………1626.4. Future Work……………………………………………………………….164Bibliography…………………………

…………………………………………….166List of Publications………………………………………………………………..194Journal……………………………………………………………………….194Conference……………………………………………………………………195List of FiguresFigure 1 Potential military (black) and commercial (grey) application of GaN-based HEMTs ………………………………………………………………………………..2Figure 2 Applica

tions of various power devices………………………………………4Figure 3 GaN based electronic applications market…………………………………..5Figure 4 GaN-HEMT power amplifiers for different operating frequencies…………7Figure 5 GaN power device market size split by application…………………………7Figure 6 Introduction of Internet of Things……

……………………………………...9Figure 7 Introduction of 5G………………………………………………………….10Figure 8 Transistor density in million transistor per millimeter square area over the years………………………………………………………………………………….11Figure 9 Evolution of Intel’s transistor fins that form the current-carrying transistor channel taller an

d closely spaced then the previous generation……………………..11Figure 10 Wave impedance dependence on the distance from the source…………..15Figure 11 Conduction emission interaction with device under test…………………17Figure 12 Electric field coupling between the conductors………………………….18Figure 13 Magnetic field c

oupling between the conductors………………………..18Figure 14 GaN-HEMT structure……………………………………………………22Figure 15 Comparison between different substrates on which GaN can be grown...23Figure 16 Market comparison of GaN-on-SiC and GaN-on-Silicon with respect to different applications as per the requirement of c

ost and volume………………….23Figure 17 Material below the horizontal interface is semiconductor; the trapezoidal shape defines the gate metal. Right side is toward the drain, and left side is toward the source in all three images. (a) shows the formation of pits on both the source- and drain-side edges o

f the gate, (b) shows the formation of a crack, and (c) shows a severe case of degradation where the gate metal (Pt) has diffused into the crack formed………………………………………………………………………………..26Figure 18 TEM images of defects formed in the drain side after the reliability tests; IDmax drops of (a) and (b) wa

s 19% and 58%, respectively……………………….27Figure 19 Vertical electric field profile in the vicinity of the 0.25 µm long gate of a GaN-HEMT in the OFF-state with VGS = -5 V and VDS = 33 V…………………….29Figure 20 Elastic energy density in AlGaN and GaN layers of a GaN-HEMT in the OFF- state at VGS = -5 V and

VDS = 33 V…………………………………………..29Figure 21 TEM analysis performed along the gate width on two different locations. The gate corner on the drain side is shown in both pictures. The dashed line on the TEM pictures indicates the AlGaN/GaN interface…………………………………..30Figure 22 Electroluminescence (EL) of Al

GaN/GaN HEMT after stress at VDS = 25 V and class AB operation. Circled region indicates area of channel that has an increase in non-radiative trap formation after stress. Uniform EL emission during forward bias was observed prior to stress. PL spectra taken at circled region…………………….31Figure 23 Ima

ge of a representative breakdown failure sample without field plate.32Figure 24 Image of a representative of breakdown failure sample………………….33Figure 25 Breakdown area located in the field plate………………………………34Figure 26. Optical Micrograph of power amplifier IC caption…………………..38Figure 27.(a) Enlarged

view of area before drain and gate meltdown in GaN-HEMT (at magnification of 2000x), (b) Enlarged tilted view of area after drain and gate meltdown in GaN-HEMT (at magnification of 1500x), and (c) Zoom-in SEM micrograph of the drain and gate meltdown region (at magnification of 3500x) of (b)…………………

………………………………………………………………41Figure 28. Principle of Optical microscope………………………………………….45Figure 29. Principle of Scanning Electron Microscope……………………………47Figure 30 Schematic diagram of the beam–specimen interaction…………………….50Figure 31. Schematic of the specimen with FIB and SEM columns for serial-sect

ioning via cross-section milling………………….………………………………………….53Figure 32 GaN-HEMT power amplifier prepared for Focus Ion Beam-Scanning Electron Microscopy (FIB-SEM)…………………………………………………….55Figure 33 (a) Tilted side view of the drain and gate meltdown regions in the failed transistor in GaN-HEMT, (b) Enlar

ged view of drain and gate meltdown region in the failed transistor of GaN-HEMT………………..…………………………………56Figure 34 (a) Tilted side view of the drain and gate meltdown regions in failed transistor in GaN-HEMT where SEM-EDS performed; location of different elements are shown in EDS map for (b) gold, (c)

gallium, (d) oxygen, (e) silicon, (f) carbon……………..60Figure 35 Types of solvers used by EM simulators with their applications………….66Figure 36 Comparison of 2.5D and 3D simulation (a) side and top view of basic line via structure used for simulation in ANSYS HFSS and SIwave respectively, (b) magnetic

field distribution in ANSYS HFSS and SIwave software respectively……..71Figure 37 Methodology setup flow diagram. ADS software is used in Block 1, whereas HFSS is used in Block 2. Block 3 uses FLS Langer 106…………………….73Figure 38 Power amplifier IC layout in ADS (a) with transistors in ADS and (b) wit

hout transistors. Points A and B are the gates and sources of the transistors, respectively, in ADS………………………………………………………………………….74Figure 39 Power amplifier IC layout without transistor in HFSS. (a) 3-D trimetric (b) Side view shows dielectric layers……………………………………………………75Figure 40 PCB circuit with Ga

N-HEMT Power Amplifier IC………………………..78Figure 41 Near-field measurement setup for GaN-HEMT power amplifier circuit with FLS Langer 106, power supplies, and signal generators……………………………..78Figure 42 Near-field measurement setup shows the distance between the magnetic probe and GaN-HEMT power amplifier

IC…………………………………………..79Figure 43 Measured magnetic field distribution over the power amplifier IC layout. White dots represent the points where measurement is performed…………………79Figure 44 Simulated magnetic field distribution over the power amplifier IC layout. White dotted boxes are the area matchin

g with the simulation and measurement results…………………………………………………………………………...……80Figure 45 (a) Actual power amplifier IC, (b) Power Amplifier IC layout without a transistor and with bond wires in HFSS, (c) Magnetic field distribution simulated with wire bonding……………..…………………………………………………………..82Figure

46 (a) Electric field distribution over the power amplifier IC layout, (b) Power amplifier IC layout with corresponding description of various locations in (a)……84Figure 47 (a) Magnetic field distribution over the power amplifier IC layout, (b) Power amplifier IC layout…………..…………………………………………………….86F

igure 48 Surface current density plot of the GaN-HEMT power amplifier IC (a) top-view, (b) zoom in view of the failure region of transistor with nearby inductor…….87Figure 49 (a) Normalized magnetic field distribution over the top metal surface of inductor and the failed GaN-HEMT transistor. The whi

te color streamlines show the presence of eddy current in the transistor drain and gate metal plate. Black circles in inductor show the eddy current streamlines in inductor, (b) zoom in view of inductor only, where streamlines locations are encircled, and only two white streamlines is found, indicat

ing very low eddy current in the coil, (c) Red color streamlines show presence of concentrated eddy current over the failed site of the transistor, (d) Surface current density plot of the GaN-HEMT power amplifier IC, where eddy current streamlines are overlapping over the failed GaN-HEMT………………………...

…..91Figure 50 Thermal simulation results of (a) top view of 3D model of GaN-HEMT and nearby inductor (b) Side view of GaN-HEMT……………………………………….92Figure 51 Power amplifier GaN-HEMT IC in ANSYS HFSS shows the placement of reflection planes inside the IC………………………………………………..………97Figure 52 Magnetic field

intensity on the reflection planes inside the power amplifier GaN-HEMT IC as computed using ANSYS HFSS…………………………………100Figure 53 Maximum magnetic field strength at different horizontal distances between the inductor and transistors…………………………...……………………………..101Figure 54. Power amplifier GaN-HEMT IC i

n ANSYS HFSS shows the placement of reflection planes outside the IC………………………………….………………….103Figure 55. Maximum magnetic field strength at different lateral distance…………103Figure 56 Basic test structure used in this work. The via height is 700 nm, via diameter is 100 nm and all the traces have width

of 47.5 nm………………………………….105Figure 57 Test structure with ground plane (light green) in between……………..105Figure 58 Test structure with traces 1 and 2, 90 degrees apart. The dark green traces are the ground traces………………………………………………………………106Figure 59 Ground trace is 50 nm below trace 2, and traces 1 a

nd 2 are 180 degrees apart with three vias and inter-via separation of 1 µm……………………………106Figure 60 Ground trace is 100 nm below trace 2, and traces 1 and 2 are 180 degrees apart with three vias and inter-via separation of 1 µm…………………………..106Figure 61 Ground trace is 50 nm above trace 1, and traces 1

and 2 are 180 degrees apart……………………………………………………………………………….107Figure 62 Ground trace is 50 nm below trace 2 and above trace 2, and traces 1 and 2 are 180 degrees apart………………………………………………………………107Figure 63 Test structure with ground plane (light green) in between……………..107Figure 64 EME from various te

st structures over a wide range of frequencies…….109Figure 65 Near field and Far field EMI for the different test structures…………….110Figure 66 Parasitic Equivalent Circuit of a Test Circuit…………………………...111Figure 67 Electric Field distribution for test structure (a)…………...………………112Figure 68 Electric

Field distribution for test structure (b)…………………….….112Figure 69 Electric Field distribution for test structure (c)………………………….113Figure 70 Electric Field distribution for test structure (d)…………………………113Figure 71 Electric Field distribution for test structure (e)…………………………..114Figure 72 Electric Fiel

d distribution for test structure (f)…………………………..115Figure 73 Electric Field distribution for test structure (g)…………………………..116Figure 74 Experimental Magnetic field distribution at 200µm height of vertical measurement plane………………………………………………………………..117Figure 75 Magnetic field distribution over the I

C…………..……………………….119Figure 76 Electric field distribution over the IC……………………….……………121Figure 77. Maximum magnetic field strength at different vertical height…………...122Figure 78. 3D-ICs trend for vertical distance between ICs………………………….124Figure 79. Maximum magnetic field strength at different verti

cal height and operating frequency………………………………………………………………………….125Figure 80 Maximum magnetic field strength for operating frequency of 3GHz at different vertical heights (a) 0 μm (black box represents the maximum emission region), (b) 10 μm, (c) 20 μm, (d) 40 μm and (e) 50 μm………….........…………….129Fi

gure 81. 3D-IC layout in HFSS, (a) 2 layers in stack of 3D-IC (2D-3DIC) and (b) 3 layers in stack of 3D-IC (3D-3DIC)…………………..…………………………….130Figure 82. Maximum magnetic field strength at the surface of top IC with different vertical separation between the dies in a stack of 3D –IC with 2 layers. The

vertical separation is (a) 0 μm, (b) 50 μm (c) 300 μm respectively, and the operating frequency is 3GHz……………………………………..………………………………………132Figure 83. Maximum magnetic field strength versus the distance between the layers of 2D-3D-IC at 3 GHz operating frequency………………………………………….133Figure 84. Maximum m

agnetic field strength versus the distance between the reference plane and topmost layer of 3D-IC at 3 GHz operating frequency………………….134Figure 85. Maximum magnetic field strength versus the distance between the layers of 3D-IC at 3 GHz operating frequency at the top surface of all the dies…………….135

Figure 86 Computed magnetic field distribution at 0-µm for 2 GHz and 4 GHz..138Figure 87 dX and dY parameter values in the power amplifier IC layout………...154Figure 88. dX and dY parameter values provided by RSM………………………..154Figure 89. New proposed IC layout in Keysight ADS……………………………155Figure 90. (a

) Optimized Power amplifier IC layout (b) Simulated magnetic field distribution of optimized layout…………………………………………………..156Figure 91 Surface plot of response vs Y-axis, X-axis……………………………158Figure 92. Contour plot of response (magnetic field) vs Y-axis, X-axis…………158 List of TablesTable 1 Material Pr

operties of Semiconductor Materials……………………………4Table 2 Different failure mechanism and their respective regions…………………24Table 3 Magnetic field emission level from measurement and simulation models……………………………………………………………………………..83Table 4 Combination of dx and dy values used for DOE with their respect

ive response…………………………………………………………………………..133Table 5 Response surface regressions……………………………………………157